Ceramic hollow packages have been used for high frequency semiconductor devices operating at high frequencies exceeding 200 MHz. In recent years, however, in order to reduce the cost, inexpensive molded resin packages have been examined.
FIGS. 7(a) and 7(b) are diagrams illustrating a GaAs FET device as an example of a conventional high frequency semiconductor device encapsulated in a molded resin package FIG. 7(a) is a perspective view of the device, and FIG. 7(b) is a cross-sectional view taken along line 7b--7b in FIG. 7(a). In these figures, reference numeral 5 designates leads comprising 0.125.about.0.15 mm thick Fe--Ni alloy.
These leads are a source lead 5a, a gate lead 5b, and a drain lead 5c. The space d between the source lead 5a and the gate-lead 5b or the drain lead 5c is wider than the thickness of these leads A square GaAs FET chip 1, about 0.15 mm thick and about 0.4 mm long along each side, is die-bonded onto the source lead 5a with a bonding material 3, such as solder. Terminals (not shown) of the FET chip 1 are connected to the leads 5 with Au wires 2. The FET chip 1 is encapsulated in a molded resin package 7. The package 7 is about 1 mm thick and about 2 mm long along each side. The FET chip 1 is located in the middle of the height of the package 7. In order to facilitate soldering of the package 7 to a printed substrate (not shown) in a subsequent mounting process, the leads 5 are downwardly bent with respect to the planar front surface of the package 7, and end portions of the respective leads 5 are outwardly bent so that the end portions are parallel to and level with the planar bottom of the package 7. That is, each lead 5 is bent stepwise from the side surface of the package 7 toward the end of the lead. Reference character .delta. designates a height of a bent portion of each lead 5, more specifically, a distance from an upper surface of a lowermost portion of the lead 5 and an upper surface of an uppermost portion of the lead 5. The height .delta. is about 0.4 mm.
A description is given of a method of fabricating the GaAs FET device shown in FIGS. 7(a) and 7(b).
Initially, a metal plate, such as an Fe--Ni alloy plate, is prepared, and desired openings are formed in the metal plate by chemical etching or punching to produce a lead frame (not shown) in which planar leads 5a, 5b, 5c are connected with each other through a metal frame. An FET chip 1 is die-bonded onto the source lead 5a in the lead frame, and terminals of the chip 1 are connected to the leads 5a, 5b, and 5c with Au wires 2. Thereafter, a portion of the lead frame where the chip 1 is die-bonded is sealed in a molded resin, such as epoxy resin. For example, this sealing is performed by sandwiching the lead frame with a pair of metal molds and pouring a liquid resin into the metal molds. Thereby, a molded resin package 7 is produced. Finally, the metal frame is cut from the lead frame to separate the leads 5a, 5b, and 5c from each other, and the leads outside the package 7 are bent as shown in FIG. 7(a).
The conventional molded resin package has an advantage over a ceramic package in being more cheaply produced.
However, a high frequency semiconductor device, such as a GaAs FET, sealed in a molded resin package is inferior to a high frequency semiconductor device sealed in a ceramic package in the gain characteristic which is very important for a high frequency semiconductor device. For example, the gain is reduced by 2.about.3 dB.